Thesis

A Highly Productive Implementation of an Out-of-Order Processor Generator

Christopher Celio. A Highly Productive Implementation of an Out-of-Order Processor Generator. Technical Report No. UCB/EECS-2018-151. Berkeley, CA. December 2018.

Thesis

Technical Reports

The Berkeley Out-of-Order Machine (BOOM): An Industry-Competitive, Synthesizable, Parameterized RISC-V Processor

Christopher Celio, David A. Patterson and Krste Asanovic. The Berkeley Out-of-Order Machine (BOOM): An Industry-Competitive, Synthesizable, Parameterized RISC-V Processor. Technical Report No. UCB/EECS-2015-167. Berkeley, CA. June 2015.

Report

Conference Talks

3rd CARRV Workshop: Replicating and Mitigating Spectre Attacks on a Open Source RISC-V Microarchitecture

Speaker: Jerry Zhao, Abraham Gonzalez. Replicating and Mitigating Spectre Attacks on a Open Source RISC-V Microarchitecture. 3rd Workshop on Computer Architecture Research with RISC-V 2019. Phoenix, AZ. June 2019.

Paper | Slides

Chisel Community Conference 2018: BOOM: An open-source out-of-order processor and the BOOM Project

Speaker: Christopher Celio, Jerry Zhao, Abraham Gonzalez and Ben Korpan. BOOM: An open-source out-of-order processor and the BOOM Project. Chisel Community Conference 2018. Berkeley, CA. November 2018.

Slides: Processor | Slides: Project | Video

HC30 Conference: BROOM: An open-source Out-of-Order processor with resilient low-voltage operation in 28nm CMOS

Speaker: Christopher Celio. BROOM: An open-source Out-of-Order processor with resilient low-voltage operation in 28nm CMOS. Hot Chips 30 Conference. Cupertino, CA. August 2018.

Slides | Video

1st CARRV Workshop: BOOM v2: An open-source out-of-order RISC-V core

Christopher Celio, Pi-Feng Chiu, Borivoje Nikolic, David A. Patterson and Krste Asanovic. BOOM v2: an open-source out-of-order RISC-V core. Technical Report No. UCB/EECS-2017-157. Berkeley, CA. September 2017.

Report

3rd RISC-V Workshop: The Berkeley Out-of-Order Machine (BOOM!): An Open-source Industry-Competitive, Synthesizable, Parameterized RISC-V Processor

Speaker: Christopher Celio. The Berkeley Out-of-Order Machine (BOOM!): An Open-source Industry-Competitive, Synthesizable, Parameterized RISC-V Processor. 3rd RISC-V Workshop. Redwood Shores, CA. January 2016.

Slides | Video

2nd RISC-V Workshop: The Berkeley Out-of-Order Machine (BOOM!): Computer Architecture Research Using an Industry-Competitive, Synthesizable, Parameterized RISC-V Processor

Speaker: Christopher Celio. The Berkeley Out-of-Order Machine (BOOM!): Computer Architecture Research Using an Industry-Competitive, Synthesizable, Parameterized RISC-V Processor. 2nd RISC-V Workshop. The International House, Berkeley, CA. June 2015.

Slides | Video